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ASIC Multi-FPGA Prototyping Debug Suite

Certus gives a single synchronized simulator-style view across your ASIC design providing visibility into multi-FPGAs on a prototyping platform. The Analyzer allows rapid debug cycles and easy capture of signals through the JTAG interface. The Implementor allows designers to quickly implement debug visibility into each FPGA from a single interface.

 

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Manage many FPGAs

Certus operates at any hierarchical level on your ASIC RTL. The unique architecture allows observation of any number of signals on multiple FPGAs simultaneously, across any number of timing domains, aligned to your trigger. There’s no need to capture signals at different points in the design and try to align the results yourself, the Analyzer manages everything for you through a single JTAG port or alternate microprocessor interface. Certus supports Verilog, System Verilog, and VHDL.

Minimizes recompilation

The Infrastructure automatically implements lossless compression on captured signals and bit-packs data to make optimal use of scarce FPGA memories. The proprietary any-signal-anytime observation network further reduces logic requirements per observed signal. This means you can instrument 1000s of signals in your design with no additional FPGA resources, and arbitrarily switch between them without any modification to the FPGA. This significantly reduces the number of debug iterations required to pinpoint functional problems, so engineers can spend their time verifying logic rather than waiting for recompilation.

Easy to adopt and use

Certus fits seamlessly into any CAD flow. The easy to use Implementor software guides you through the process of signal selection and instrumentation, giving you instant feedback on logic requirements, so you don't have to wonder whether the design will still fit in your FPGA. The Analyzer lets you quickly and easily capture signals so you can understand the internal function of your design. Plus, the tcl command line interface lets you automate tests and make multiple capture runs so you can resolve problems that take a long time to manifest.